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RVStackIn Development

RVStack

A developer cloud, compatibility scanner, emulator workflow, app certification system and software distribution layer for RISC-V.

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View the RISC-V roadmap

RVStack is Aevornix's software-first RISC-V platform. It helps developers build, test, optimise, certify and publish software for RISC-V environments before mass-market hardware is ready.

The problem

Software must arrive before hardware scale.

Open architectures do not fail on silicon. They fail because there is nothing to run, and there is nothing to run because building for a target you cannot obtain is impractical.

  • Limited access to target hardware

    You cannot buy the machine you are meant to be building for, so the first real test happens far too late.

  • Fragmented toolchains

    Compiler, linker, debugger and SDK come from different places and different versions, and integrating them is the project before the project.

  • Unclear device profiles

    Without a stated capability set, "supports RISC-V" means nothing specific enough to build against.

  • Late compatibility testing

    Compatibility is discovered at the end, when the cost of a wrong assumption is highest.

  • Platform-specific deployment work

    Every target needs its own packaging and delivery path, so shipping to a second target costs almost as much as the first.

Modules

What RVStack is made of: 8 modules.

Purpose, stage, current availability and dependencies for each module. None is downloadable today.

RVStack modules with their purpose, status, current availability and dependencies.
ModulePurposeStatusAvailabilityDepends on
RVStack Developer CloudHosted build and test environments, so RISC-V development does not require owning RISC-V hardware.In DevelopmentNot open to developers. Preview applications are open.Compiler Toolchain · Device Emulator
RVStack SDKHeaders, libraries and build integration for targeting RISC-V from an existing project.In DevelopmentNot published. No download exists.Compiler Toolchain
RVStack CLIDrive builds, emulator runs, scans and certification from a terminal or a CI pipeline.PlannedNot started. Scheduled behind the SDK.RVStack SDK · RVStack Developer Cloud
RVStack App ScannerInspect a package for what blocks it from running on RISC-V: native libraries, architecture-specific binaries, unavailable system services.In DevelopmentNot open to developers.Device Emulator · Device profile definitions
RVStack AI RuntimeCheck, optimise, benchmark and package AI models for RISC-V software environments.ResearchResearch stage. No runtime and no scanner exist yet.Compiler Toolchain · Device Emulator
RVStack Image BuilderAssemble deployable Linux images for supported RISC-V targets.PlannedNot started.RVStack SDK · Operating layer
RVStack CertifyProduce the compatibility and security report that a store listing and a deployment are gated on.PlannedNot started. The report format is still being defined.RVStack App Scanner · Security report
RVStack StoreDistribute RISC-V software with its architecture support, licence, scan results and test date attached.PlannedThe Aevornix Store is live, but it has no RISC-V category yet.RVStack Certify · Aevornix Store

Architecture

The platform stack, top to bottom.

Where the modules sit relative to each other and to the instruction set. Open a layer for its responsibility, what it takes in, what it hands out, the standards it holds to, its stage and the tools that implement it.

RVStack architecture, 7 layers from top to bottom: 01 Application, 02 Development toolchain, 03 Portable runtime, 04 Operating layer, 05 RISC-V architecture, 06 Device profile, 07 Deployment target.

  1. Application
    Games, tools and software targeting the Aevornix platform.
    .aev project format
    Open
    Responsibility
    The software a developer actually writes, and the project format it is authored in.
    Development status
    Developer Preview
    Inputs
    Project sources, scenes, scripts, assets
    Outputs
    A buildable Aevornix project
    Standards
    .aev project format
    Related tools
    Aevornix Engine · Aevornix Control · AevCode
  2. Development toolchain
    Compiler, linker, debugger, SDK and build systems.
    ELFDWARF
    Open
    Responsibility
    Turning project sources into binaries for a chosen open target.
    Development status
    In Development
    Inputs
    Project sources and a selected target profile
    Outputs
    Compiled objects, linked binaries, debug information
    Standards
    ELF · DWARF
    Related tools
    Compiler Toolchain · SDK
  3. Portable runtime
    Execution services shared across supported RISC-V targets.
    Open
    Responsibility
    Running the same compiled project consistently on every supported target.
    Development status
    In Development
    Inputs
    A compiled Aevornix project
    Outputs
    A running application with consistent execution semantics
    Related tools
    Aevornix Runtime
  4. Operating layer
    System services, permissions, storage, networking and application lifecycle.
    POSIX-style system interfaces
    Open
    Responsibility
    Mediating between the runtime and the machine: what an application may do, and how it starts, stops and persists.
    Development status
    Research
    Inputs
    Runtime requests for storage, network, input and lifecycle
    Outputs
    Mediated system services under a permission model
    Standards
    POSIX-style system interfaces
    Related tools
    Aevornix OS
  5. RISC-V architecturefoundation
    The open instruction-set foundation beneath the software stack.
    RV64GCRVA23
    Open
    Responsibility
    The instruction set every layer above is ultimately compiled and scheduled for.
    Development status
    Research
    Inputs
    Compiled instructions
    Outputs
    Executed instructions on an open ISA
    Standards
    RV64GC · RVA23
  6. Device profile
    Defined hardware capabilities used for emulation and compatibility testing.
    Open
    Responsibility
    Describing a target machine precisely enough to build and test against before it exists.
    Development status
    Research
    Inputs
    A capability definition: ISA extensions, memory, graphics, input, storage
    Outputs
    A profile that emulation and compatibility checks run against
    Related tools
    Device Emulator · Compatibility Scanner
  7. Deployment target
    Physical devices, virtual environments, cloud targets and certified platforms.
    linux-riscv64
    Open
    Responsibility
    Where a certified build is finally delivered and run.
    Development status
    Research
    Inputs
    A certified build plus its profile
    Outputs
    A deployed, running application
    Standards
    linux-riscv64
    Related tools
    Developer Cloud

Compatibility

What a compatibility report will cover.

A build is checked against a profile across these categories, and the report names exactly what is met and what is not.

Scoring systemResearch

The scoring system is at research stage. Scores will appear on a report once it is producing them.

Instruction-set support
Which ISA extensions the build requires, against what the profile provides.
Memory profile
Working-set and allocation behaviour against the profile budget.
Graphics capability
Rendering features the project uses against those the profile declares.
Operating services
System services the project calls, and whether the operating layer offers them.
Network services
Connectivity assumptions against the profile network capability.
Input capability
Input devices and schemes the project expects against the profile input set.
Storage profile
Install footprint and runtime storage against the profile allowance.
Performance budget
Frame, load and throughput targets defined by the profile.
Security requirements
Permissions and isolation the project requires against what the target enforces.

Targets

Where RVStack builds are meant to run.

Separated by horizon: the targets being built toward first, and those that depend on future hardware.

Built against first

  • Cloud emulator

    In Development

    Hosted emulated device profiles, so target testing needs no local hardware.

  • Linux RISC-V

    In Development

    Standard 64-bit Linux on RISC-V, the first real deployment target.

Depends on future hardware

  • Embedded profile

    Research

    Constrained devices with a reduced capability set.

  • Mobile profile

    Research

    RISC-V-first mobile devices with their own network and device services.

  • Edge profile

    Research

    Industrial and edge nodes running the portable runtime.

  • Future Aevornix devices

    Future Platform

    The home, handheld and cloud profiles described on the Devices page.

The standards listed against each layer above are those the layer already meets. A consolidated standards commitment will be published as the work progresses.

Development

Where the work stands.

Grouped by what is happening to each item, with its current objective and dependencies.

Active(2)

  • Compiler toolchain

    In Development

    Compile and link Aevornix projects for 64-bit RISC-V targets.

    Depends on
    Device profile definitions

  • Device emulator

    Prototype

    Execute builds against a defined device profile so target behaviour is observable before hardware exists.

    Depends on
    Device profile definitions

Next(7)

  • RISC-V SDK

    In Development

    Provide the headers, libraries and build integration developers target open architectures through.

    Depends on
    Compiler toolchain

  • App scanner

    In Development

    Report exactly which profile requirements a build meets, category by category.

    Depends on
    Device emulator · Device profile definitions

  • Developer Cloud

    In Development

    Host build and test environments so RISC-V development needs no local target hardware.

    Depends on
    Compiler toolchain · Device emulator

  • Image builder

    Planned

    Assemble deployable Linux images for supported RISC-V targets.

    Depends on
    RISC-V SDK · Operating layer

  • RVStack Certify

    Planned

    Define the compatibility and security report that gates a store listing and a deployment.

    Depends on
    App scanner · Security report

  • RVStack CLI

    Planned

    Drive build, emulate, scan, certify and publish from a terminal or a continuous-integration pipeline.

    Depends on
    RISC-V SDK · Developer Cloud

  • RISC-V Store category

    Planned

    Add a Store category that carries architecture support, operating-system target, scan results and the date a product was last tested.

    Depends on
    RVStack Certify · Aevornix Store

Research(2)

  • Deployment manager

    Research

    Deliver certified builds to emulator, cloud and physical targets.

    Depends on
    RVStack Certify · Image builder

  • RISC-V AI runtime

    Research

    Establish which model formats, operators and precisions are practical on RISC-V, and what a runtime would have to provide.

    Depends on
    Compiler toolchain · Device emulator
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RISC-V

The rest of the programme

Build for open architectures.

Join Developer Preview View the RISC-V roadmap Read RISC-V documentation